There has been examined a semiconductor device using carbon nanotubes (hereinafter referred to as CNTs) for a channel layer. A CNT is a carbon material in which a graphite sheet forms a seamless cylindrical structure. The thickness of a CNT is about 0.7 nm at the minimum, and the length of a CNT is generally in a range of from 1 μm to several tens of micrometers. Some long CNTs have a length greater than 1 mm. CNTs having a thickness of about 5 nm or more exhibit a characteristic of a metal (conductor). Some CNTs having a thickness of 5 nm or less may exhibit a characteristic of a semiconductor depending upon how to wind a graphite sheet (the chirality or the spirality). There has been studied application of those CNTs that exhibit semiconductor characteristics to semiconductor devices.
A CNT has a characteristic of a high electron (hole) mobility (e.g., 1000 cm2/Vs to 10000 cm2/Vs) that exceeds that of silicon, which is currently used for semiconductor devices in general. Such a characteristic is greatly expected to meet demands for a switching device such as a field-effect transistor (FET), particularly a switching device used for an image display device that requires a high speed of response.
Furthermore, a CNT also has advantages in view of a method of manufacturing a semiconductor device. A semiconductor device can be manufactured with use of CNTs by attaching CNTs that have been produced by a bulk growth method, such as a laser abrasion method, an arc plasma method, or a chemical vapor deposition method, to a surface of a substrate. This process does not require a high process temperature. Therefore, a transistor having a high mobility can readily be produced.
The advantage of no need of a high process temperature during a manufacturing process is suitable to meet requirements for thin image display devices in particular. Some of demands in production of an image display device are reduction in weight of the device and flexibility in terms of easiness of bending or rounding. In an active matrix type device, polycrystalline silicon is generally used as TFTs for an active matrix. However, use of polycrystalline silicon requires an annealing process at a high temperature (e.g., at least 300° C.) in order to increase the mobility. Therefore, the process temperature cannot be decreased.
In order to use a plastic substrate, the process temperature should be decreased to 200° C. at the highest, preferably to about 120° C. or less. Therefore, a glass substrate, which is heavy and is likely to be broken, rather than a plastic substrate, has been used as a substrate. Thus, CNTs, which may be almost the only semiconductor material that can be used at a considerably low process temperature, have been expected as a semiconductor material that does not require a high-temperature annealing process.
Furthermore, one of problems in an image display device using active matrix liquid crystal devices or EL cells is suppression of a photo-leakage-current. If light (up to 105 lx) enters silicon TFT portions of pixels from a backlight, a photo-leakage-current increases. In order to suppress the photo-leakage-current, a portion of pixel transistors should be covered with a light-shield film formed of a metal film. However, an aperture ratio is limited by an area of the pixel transistors.
As a result, in the image display device, the limitation on the pixel aperture ratio may cause reduction in variation ranges of the maximum luminance or brightness, or loss of light may cause reduction in energy efficiency. At the same time, addition of a process of producing a metal light-shield film deteriorates a ratio of performance to cost. By contrast, a semiconductor device using CNTs has a characteristic of a remarkably reduced photo-leakage-current as disclosed in Japanese Journal of Applied Physics, Vol. 44, No. 4A, p. 1592 (2005). Therefore, CNTs have been expected in view of cost and also as means for solving the problem of a leakage current.
However, when CNTs are applied to a semiconductor device, attention should be paid to the fact that CNTs having a characteristic of a conductor and CNTs having a characteristic of a semiconductor are simultaneously produced in a manufacturing process of those CNTs. In a case where a transistor is produced with use of CNTs produced in the raw, switching characteristics such as a ratio of an on-state current and an off-state current of the transistor (hereinafter abbreviated to an on/off ratio) are problematically deteriorated by a leakage current flowing between a source and a drain (S-D) if there are one or more conductive CNTs.
Therefore, there has been made an attempt to remove conductive CNTs from grown CNTs or an attempt to selectively grow only semiconductive CNTs. However, it is difficult to remove all conductive CNTs in reality. For example, even if conductive CNTs and semiconductive CNTs are to be separated from each other after growth, those CNTs are likely to aggregate due to static electricity or physical adsorption. Additionally, because CNTs have a structure that is very thin and long, it is difficult to separate CNTs once they aggregate.
Furthermore, it is very difficult to separately produce conductive CNTs and semiconductive CNTs during a growth process. For example, even if the grain size of a metal catalyst used for growth of CNTs is made uniform within an error of 0.1 nm, the chirality of a CNT changes and alternates which characteristic the CNT has, i.e., the conductive characteristic or the semiconductive characteristic. Thus, it is difficult to separate conductive CNTs and semiconductive CNTs from each other or to separately produce conductive CNTs and semiconductive CNTs. Therefore, it is desirable to produce a transistor having a high on/off ratio even if a material in which conductive CNTs and semiconductive CNTs are mixed is used to produce a semiconductor device.
As a method of improving the performance of a semiconductor device using CNTs that mixedly include conductive CNTs and semiconductive CNTs, Science, Vol. 292 (2001) p. 706, discloses a selectively burning-off method. However, this method requires a considerably greater current flowing for the burning-off process as compared to an operation current of a semiconductor device. Therefore, this method has problems that a large load is imposed on the entire semiconductor device, that it is difficult to obtain stable properties of semiconductor devices individually processed, and that an on-state current of a transistor is reduced by the burning-off process. Accordingly, this method is not practical in the industrial aspect.
Furthermore, the following patent documents relate to a semiconductor device using CNTs. Japanese laid-open patent publication No. 2005-93472 discloses a method of manufacturing a field-effect semiconductor device using carbon nanotubes for a current path which includes a step of preparing a dispersion of carbon nanotubes, a step of attaching the dispersion to a predetermined pattern, and a step of drying the dispersion to form a current path of carbon nanotubes. Japanese laid-open patent publication No. 2005-93472 discloses use of carbon nanotubes having a length ranging from 0.1 μm to 10 μm.
Furthermore, Japanese laid-open patent publications Nos. 2003-17508 and 2007-12665 disclose a field-effect transistor in which a channel layer is formed of a plurality of carbon nanotubes arranged in parallel to a channel. Japanese laid-open patent publication No. 2006-190868 discloses a nonvolatile storage device having a channel layer of carbon nanotubes. However, those prior art documents disclose neither the problems to be solved by the present invention nor the technical concept to solve those problems and thus fail to suggest the present invention.